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july 2009 doc id 12581 rev 10 1/32 1 VND5025AK-E double channel high si de driver with analog current sense for automotive applications features main ? in-rush current active management by power limitation ? very low standby current ? 3.0v cmos compatible input ? optimized electromagnetic emission ? very low electromag netic susceptibility ? in compliance with the 2002/95/ec european directive ? package: ecopack ? diagnostic functionsdoc id 12581 ? proportional load current sense ? high current sense precision for wide range currents ? current sense disable ? thermal shutdown indication ? very low current sense leakage protection ? undervoltage shut-down ? overvoltage clamp ? load current limitation ? self-limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? thermal shutdown ? reverse battery protection (see application schematic on page 21 ) ? electrostatic discharge protection application all types of resistive, inductive and capacitive loads suitable as led driver description the VND5025AK-E is a monolithic device made using stmicroelectronics vipower m0-5 technology, intended fo r driving resistive or inductive loads with one side connected to ground, and suitable for driving leds. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). this device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when cs_dis is driven low or left open. when cs_dis is driven high, the current sense pin is in a high impedance condition. output current limitation protects the device in overload condition. in case of long overload duration, the device limits the dissipated power to safe level up to thermal shut-down intervention. thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears. max transient supply voltage v cc 41v operating voltage range v cc 4.5 to 36v max on-state resist ance (per ch.) r on 25 m current limitation (typ) i limh 41 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-24? table 1. device summary package order codes tube tape and reel powersso-24? VND5025AK-E vnd5025aktr-e www.st.com
contents VND5025AK-E 2/32 doc id 12581 rev 10 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 21 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 22 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 23 4 package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 powersso-24? thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ecopack? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VND5025AK-E list of tables doc id 12581 rev 10 3/32 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. switching (vcc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. current sense (8v < vcc < 16v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 12. electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 13. electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 14. electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 16. powersso-24? mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of figures VND5025AK-E 4/32 doc id 12581 rev 10 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. delay response time between rising edge of output current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. iout/isense vs iout (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. maximum current sens e ratio drift vs load current (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 15. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 17. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. ilimh vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 23. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23 figure 28. powersso-24? pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 29. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 24 figure 30. powersso-24? thermal impedance junction to ambient single pulse (one channel on) . 25 figure 31. thermal fitting model of a double channel hsd in powersso-24? (1) . . . . . . . . . . . . . . . 25 figure 32. powersso-24? package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 33. powersso-24? tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 34. powersso-24? tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VND5025AK-E block diagram and pin description doc id 12581 rev 10 5/32 1 block diagram and pin description figure 1. block diagram table 2. pin functions name function v cc battery connection. output 1,2 power output. gnd ground connection; must be reverse battery protected by an external diode/resistor network. input 1,2 voltage controlled input pin with hyst eresis, cmos compatible; controls output switch state. current sense 1,2 analog current sense pin; delivers a current proportional to the load current. cs_dis active high cmos compatible pin to disable the current sense pin. logic undervoltage overtemp. 1 i lim 1 pwclamp 1 i out1 gnd input1 output1 current sense1 driver 1 v cc clamp v dslim 1 i lim 2 pwclamp 2 driver 2 v dslim 2 overtemp. 2 i out2 output2 current sense2 cs_dis k 2 input2 pwr lim 1 pwr lim 2 k 1 vcc
block diagram and pin description VND5025AK-E 6/32 doc id 12581 rev 10 figure 2. configurati on diagram (top view) table 3. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating n.r. (1) 1. not recommended. xx x x to ground through 1k resistor x n.r. through 10k resistor through 10k resistor 1 2 3 4 5 6 n.c. input1 gnd v cc n.c. input2 7 8 9 10 11 12 cs_dis. v cc current sense1 n.c. n.c. current sense2 24 23 22 21 20 19 output2 output2 output2 output2 output2 output2 18 17 16 15 14 13 output1 output1 output1 output1 output1 output1 tab = v cc
VND5025AK-E electrical specification doc id 12581 rev 10 7/32 2 electrical specification figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. v f i s i gnd v cc v cc v sense2 output1 i out1 current i sense1 input1 i in1 v in2 v out2 gnd cs_dis i csd v csd input2 i in2 v in1 sense1 output2 i out2 current i sense2 sense2 v sense1 v out1 table 4. absolute maximum ratings symbol parame ter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a - i out reverse dc output current 24 i in dc input current -1 to 10 ma i csd dc current sense disable input current -i csense dc reverse cs pin current 200 v csense current sense maximum voltage v cc - 41 to +v cc v
electrical specification VND5025AK-E 8/32 doc id 12581 rev 10 2.2 thermal data e max maximum switching energy (single pulse) (l = 0.8mh; r l =0 ; v bat = 13.5v; t jstart = 150c; i out = i liml (typ.)) 140 mj v esd electrostatic discharge (human body model: r = 1.5k ; c = 100pf) - input - current sense - cs_dis - output - v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 table 4. absolute maximum ratings (continued) symbol parame ter value unit table 5. thermal data symbol parameter max value unit r thj-case thermal resistance junction-case (max) (with one channel on) 1.35 c/w r thj-amb thermal resistance junction-ambient (max) see figure 29
VND5025AK-E electrical specification doc id 12581 rev 10 9/32 2.3 electrical characteristics 8v electrical specification VND5025AK-E 10/32 doc id 12581 rev 10 table 8. logic input symbol parameter test cond itions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in =0.9v 1 a v ih input high level voltage 2.1 v i ih high level input current v in =2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in =1ma 5.5 7 i in = -1ma -0.7 v csdl cs_dis low level voltage 0.9 i csdl low level cs_dis current v csd =0.9v 1 a v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd =2.1v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd =1ma 5.5 7 i csd = -1ma -0.7 table 9. protection and diagnostics (1) 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13v 29 41 57 a 5v < v cc < 36v i liml short circuit current during thermal cycling v cc = 13v; t r VND5025AK-E electrical specification doc id 12581 rev 10 11/32 table 10. current sense (8v < v cc <16v) symbol parameter test conditions min. typ. max. unit k led i out /i sense i out = 0.05a; v sense =0.5v; v csd =0v; t j = -40c to 150c 1450 3300 5180 k 0 i out /i sense i out = 0.5 a; v sense =0.5v; v csd =0v; t j = -40c to 150c 1720 3020 4360 dk 0 /k 0 (1) current sense ratio drift i out =0.5a; v sense =0.5v; v csd =0v; t j = -40c to 150c -12 +12 % k 1 i out /i sense i out =2a; v sense =4v; v csd =0v; t j = -40c to 150c t j = 25c to 150c 1940 2230 2810 2810 3740 3390 dk 1 /k 1 (1) current sense ratio drift i out =2a; v sense =4v; v csd =0v; t j = -40c to 150c -10 +10 % k 2 i out /i sense i out =3a; v sense =4v; v csd =0v; t j = -40c to 150c t j = 25c to150c 2250 2400 2790 2790 3450 3180 dk 2 /k 2 (1) current sense ratio drift i out =3a; v sense =4v; v csd =0v; t j = -40c to 150c -7 +7 % k 3 i out /i sense i out =10a; v sense =4v; v csd =0v; t j = -40c to 150c t j = 25c to 150c 2610 2650 2760 2760 2970 2870 dk 3 /k 3 (1) current sense ratio drift i out =10a; v sense =4v; v csd =0v; t j = -40c to 150c -4 +4 % i sense0 analog sense leakage current i out =0a; v sense =0v; v csd =5v; v in =0v; t j = -40c to 150c v csd =0v; v in =5v; t j = -40c to 150c i out =2a; v sense =0v; v csd =5v; v in =5v; t j = -40c to 150c 0 0 0 1 2 1 a a a i ol openload on- state current detection threshold v in = 5v, i sense = 5 a 5 30 ma v sense max analog sense output voltage i out =3 a; v csd =0v 5 v v senseh analog sense output voltage in over temperature condition v cc = 13v; r sense =3.9k 9
electrical specification VND5025AK-E 12/32 doc id 12581 rev 10 figure 4. current sense delay characteristics i senseh analog sense output current in over temperature condition v cc = 13v; v sense =5v 8 ma t dsense1h delay response time from falling edge of cs_dis pin v sense <4v, 0.5 VND5025AK-E electrical specification doc id 12581 rev 10 13/32 figure 5. delay response time between rising edge of output current and rising edge of current sense (cs enabled) figure 6. switching characteristics v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax t dsense2h t t t v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
electrical specification VND5025AK-E 14/32 doc id 12581 rev 10 figure 7. i out /i sense vs i out (1) 1. see table 10 for details. figure 8. maximum current sense ratio drift vs load current (1) 1. parameter guaranteed by design; it is not tested. 1000 1500 2000 2500 3000 3500 4000 4500 246810 i out (a) i out / i sense max tj = -40 c to 150 c max tj = 25 c to 150 c min tj = 25 c to 150 c min tj = -40 c to 150 c typical value -15 -10 -5 0 5 10 15 2345678910 i out (a) dk/k(%)
VND5025AK-E electrical specification doc id 12581 rev 10 15/32 figure 9. output voltage drop limitation table 11. truth table conditions input output sense (v csd =0v) (1) 1. if the v csd is high, the sense output is at a high impedance; its potential depends on leakage currents and external circuit. normal operation ll 0 hh nominal over temperature l l 0 hv senseh undervoltage l l0 h short circuit to gnd (r sc 10m ) l l 0 h 0 if t j < t tsd v senseh if t j > t tsd short circuit to v cc l h 0 h < nominal negative output voltage clamp l l 0 v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
electrical specification VND5025AK-E 16/32 doc id 12581 rev 10 table 12. electrical transient requirements (part 1/3) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 3a -100v -150v 1h 90ms 100ms 0.1s, 50 3b +75v +100v 1h 90ms 100ms 0.1s, 50 4 -6v -7v 1 pulse 100ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 40v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 table 13. electrical transient requirements (part 2/3) iso 7637-2: 2004e test pulse test level results iii vi 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40v maximum referred to ground. cc table 14. electrical transient requirements (part 3/3) class contents c all functions of the device performed as designed after exposure to disturbance. e one or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
VND5025AK-E electrical specification doc id 12581 rev 10 17/32 figure 10. waveforms sense current input normal operation undervoltage v cc v usd v usdhyst input sense current load current load current overload operation input sense current t tsd t r t j load current input load voltage sense current load current < nominal < nominal short to v cc cs_dis cs_dis cs_dis cs_dis t rs i limh i liml v senseh thermal cycling power limitation current limitation shorted load normal load
electrical specification VND5025AK-E 18/32 doc id 12581 rev 10 2.4 electrical char acteristics curves figure 11. off-state output current figure 12. high level input current figure 13. input clamp voltage figure 14. input high level figure 15. input low level figure 16. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 iloff (ua) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih(ua) vin=2.1v -50 -25 0 25 50 75 100 125 150 175 tc ( c) 5 5.25 5.5 5.75 6 6.25 6.5 6.75 7 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( c) 0 0.5 1 1.5 2 2.5 3 3.5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc ( c) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc ( c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 vhyst (v)
VND5025AK-E electrical specification doc id 12581 rev 10 19/32 figure 17. on-state resistance vs t case figure 18. on-state resistance vs v cc figure 19. undervoltage shutdown figure 20. i limh vs t case figure 21. turn-on voltage slope figure 22. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc ( c) 0 10 20 30 40 50 60 70 80 90 100 ron (mohm) iout=3a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 0 10 20 30 40 50 60 70 80 ron (mohm) tc= -40c tc= 25c tc= 125c tc=150c -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 80 90 100 ilimh (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt)on (v/ms) vcc=13v rl=4.3ohm -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt)off (v/ms) vcc=13v rl=4.3ohm
electrical specification VND5025AK-E 20/32 doc id 12581 rev 10 figure 23. cs_dis high level voltage figure 24. cs_dis low level voltage figure 25. cs_dis clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 0 0.5 1 1.5 2 2.5 3 3.5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc ( c) 0 0.5 1 1.5 2 2.5 3 3.5 4 vcsdl (v) -50 -25 0 25 50 75 100 125 150 175 tc ( c ) 4 4.5 5 5.5 6 6.5 7 7.5 8 vcsdcl (v) icsd=1ma
VND5025AK-E application information doc id 12581 rev 10 21/32 3 application information figure 26. application schematic note: channel 2 has the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: resistor in the ground line (r gnd only) this first solution can be used with any type of load. the following formulas indicate how to dimension the r gnd resistor: 1. r gnd 600mv / (i s(on)max ) 2. r gnd (-v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0 during reverse battery situations) is: p d =(-v cc ) 2 /r gnd this resistor can be shared among several different hsds. please note that the value of this resistor is calculated with formula (1), where i s(on)max becomes the sum of the maximum on- state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground, the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high-side drivers sharing the same r gnd . v cc gnd output d gnd r gnd d ld c +5v v gnd cs_dis r prot r prot current sense r prot r sense c ext input
application information VND5025AK-E 22/32 doc id 12581 rev 10 if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor, then st suggests to utilize the following solution 2. 3.1.2 solution 2: diode (d gnd ) in the ground line if the device drives an inductive load, insert a resistor (r gnd =1k ) in parallel to d gnd . this small signal diode can be safely shared among several different hsds. also in this case, the presence of the ground network produces a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2:2004e table. 3.3 mcu i/os protection if a ground protection network is used and negative transients are present on the v cc line, the control pins are pulled negative. st suggests to insert an in-line resistor (r prot ) to prevent the c i/os pins from latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of c i/os. -v ccpeak /i latchup r prot (v ohc -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -100v and i latchup 20ma; v ohc 4.5v 5k r prot 180k recommended values: r prot =10k , c ext =10nf.
VND5025AK-E application information doc id 12581 rev 10 23/32 3.4 maximum demagnetization energy (v cc =13.5v) figure 27. maximum turn-off current versus inductance (for each channel) note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. 1 10 100 0,1110100 l (mh) i (a) demagnetization demagnetization demagnetization t v in , i l c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse a b c
package and thermal data VND5025AK-E 24/32 doc id 12581 rev 10 4 package and thermal data 4.1 powersso-24? thermal data figure 28. powersso-24? pc board note: layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77mm x 86mm, pcb thickness = 1.6mm, cu thickness = 70m (front and back side), copper areas: from minimum pad layout to 8cm 2 ). figure 29. r thj-amb vs pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
VND5025AK-E package and thermal data doc id 12581 rev 10 25/32 figure 30. powersso-24? thermal impedance junction to ambient single pulse (one channel on) equation 1: pulse calculation formula where = t p /t figure 31. thermal fitting model of a double channel hsd in powersso-24? (1) 1. the fitting model is a semplified thermal tool and is valid for transient evol utions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) footprint 8 cm 2 2 cm 2 z th r th z thtp 1 ? () + ? =
package and thermal data VND5025AK-E 26/32 doc id 12581 rev 10 table 15. thermal parameters area/island (cm 2 ) footprint 2 8 r1 (c/w) 0.28 r2 (c/w) 0.9 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 r7 (c/w) 0.28 r8 (c/w) 0.9 c1 (w.s/c) 0.001 c2 (w.s/c) 0.003 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17 c7 (w.s/c) 0.001 c8 (w.s/c) 0.003
VND5025AK-E package and packing information doc id 12581 rev 10 27/32 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 package mechanical data figure 32. powersso-24? package dimensions
package and packing information VND5025AK-E 28/32 doc id 12581 rev 10 table 16. powersso-24? mechanical data symbol millimeters min typ max a 2.45 a2 2.15 2.35 a1 0 0.1 b0.33 0.51 c0.23 0.32 d 10.10 10.50 e7.4 7.6 e0.8 e3 8.8 f2.3 g 0.1 h 10.1 10.5 h 0.4 k0 8 l0.55 0.85 o1.2 q0.8 s2.9 t3.65 u1.0 n 10 x4.1 4.7 y6.5 7.1
VND5025AK-E package and packing information doc id 12581 rev 10 29/32 5.3 packing information figure 33. powersso-24? tube shipment (no suffix) figure 34. powersso-24? tape and reel shipment (suffix ?tr?) a c b all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
revision history VND5025AK-E 30/32 doc id 12581 rev 10 6 revision history table 17. document revision history date revision changes 11-apr-2006 1 initial release 30-mar-2007 2 reformatted. table 4 on page 7 : updated e max entries. table 6 on page 9 : updated v f test conditions. table 7 on page 9 : set t j condition to 25c? table 10 on page 11 : added dk 1 /k 1 , dk 2 /k 2 , dk 3 /k 3 , t dsense2h , t dsense2h values and note. added figure 5: delay response time between rising edge of output current and rising edge of current sense (cs enabled) on page 13 . updated figure 7: iout/isense vs iout (1) on page 14 . added figure 8: maximum current sense ratio drift vs load current (1) on page 14 . table 12 on page 16 : updated test level values iii and iv for test pulse 5b and notes. added section 3.4: maximum demagnetization energy (vcc = 13.5v) on page 23 . added ecopack? packages information. 01-jun-2007 3 figure 31: thermal fitting model of a double channel hsd in powersso-24? (1) : added note. 03-jul-2007 4 updated figure 1: block diagram and figure 2: configuration diagram (top view) . 24-jul-2007 5 updated table 16: powersso-24? mechanical data . 12-dec-2007 6 updated table 10: current sense (8v < vcc < 16v) : ? added dk 0 /k 0 values ? changed dk 3 /k 3 values from 3 to 4% ? changed t dsense2h value from 110 to 200 s ? added i ol parameter updated figure 8: maximum current sense ratio drift vs load current (1) with new dk/k values. 12-feb-2008 7 corrected typing error in table 10: current sense (8v < vcc < 16v) : changed i ol test condition from v in = 0v to v in = 5v. 10-apr-2008 8 corrected figure 27: maximum turn-off current versus inductance (for each channel) 02-jul-2009 9 table 16: powersso-24? mechanical data : ? deleted a (min) value ? changed a (max) value from 2.47 to 2.45 ? changed a2 (max) value from 2.40 to 2.35 ? changed a1 (max) value from 0.075 to 0.1 ? added f row ? updated k values
VND5025AK-E revision history doc id 12581 rev 10 31/32 23-jul-2009 10 updated figure 32: powersso-24? package dimensions . updated table 16: powersso-24? mechanical data : ? deleted g1 row ? added o, q, s, t and u rows table 17. document revision history (continued) date revision changes
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